According to South Korean media reports, the development process of Samsung's seventh-generation High Bandwidth Memory (HBM), HBM4E, has entered the back-end design phase of the base chip, indicating that the R&D process is already more than halfway complete.
The back-end stage of development refers to the positioning and connection of the base chip's physical circuits after the register-transfer level (RTL) logic design is finished. Upon completion of this phase, the finalized design data will be sent to chip foundries to prepare for production tape-out.
Samsung recently established a new HBM development roadmap and has notified its suppliers, requesting them to formulate supply plans by March. The new roadmap includes the R&D and production schedules for HBM4, HBM4E, and HBM5. Overall, Samsung is customizing these chips based on customer needs and accelerating their commercialization.