Microsoft Plans to Deploy LPDDR in AI Data Centers

On the 13th local time, Cadence announced a collaboration with Microsoft to develop an LPDDR5X (Low Power Double Data Rate 5X) 9600 Mbps memory system solution for data centers.

The solution integrates Cadence's LPDDR5X IP with Microsoft's proprietary error correction algorithm, RAIDDR (Redundant Independent Double Data Rate Array) ECC (Error-Correcting Code). It is designed to simultaneously deliver high performance, low power consumption, and high reliability. Microsoft plans to deploy this solution in its data centers. Both parties emphasized that by applying RAIDDR ECC technology, data protection capabilities comparable to existing server DDR5 memory have been achieved.

In addition to Microsoft, other major technology companies are also set to adopt low-power DRAM in their AI data centers, heralding new opportunities for the memory industry.

However, LPDDR is unlikely to immediately replace existing DDR5 memory in servers. This is because mainstream x86 CPUs in the server market, such as Intel’s Xeon processors and AMD’s EPYC processors, do not support LPDDR. Servers based on DDR are already widely deployed in data centers globally, and operating systems and component supply chains are primarily tailored for DDR.

Furthermore, latency is another limiting factor. Although LPDDR5X offers high bandwidth, its latency is higher than that of DDR5, making it unsuitable for latency-sensitive tasks, such as database and transaction processing.

Therefore, DDR5 will continue to dominate the general-purpose server market, while LPDDR will take the lead in the AI server domain. AI tasks prioritize bandwidth and energy efficiency, which gives LPDDR a distinct advantage. As power consumption costs increasingly become a critical issue, the adoption of LPDDR is expected to grow from a total cost of ownership (TCO) perspective.